Table 1 Peak number and redundancy per chip and matrix type.

CHCA

SPA

CHCA

SPA

CHCA

SPA

CHCA

SPA

CHCA

SPA

CHCA

SPA

Total

Nr of peaks

48

57

48

36

12

5

15

35

28

37

12

51

41

425

SEND

15

11

1

0

1

3

14

6

5

2

10

4

CM10

CHCA

15

10

6

0

0

2

15

5

10

1

5

4

SPA

11

10

1

2

1

7

8

14

4

3

1

7

H50

CHCA

1

6

1

1

0

2

2

2

14

1

0

0

SPA

0

0

2

1

1

2

1

2

0

4

1

4

H4

CHCA

1

0

1

0

1

1

0

0

0

1

2

2

SPA

3

2

7

2

2

1

4

3

1

4

2

3

IMAC30

CHCA

14

15

8

2

1

0

4

4

6

3

8

2

SPA

6

5

14

2

2

0

3

4

3

2

2

4

NP20

CHCA

5

10

4

14

0

0

1

6

3

2

2

0

SPA

2

1

3

1

4

1

4

3

2

2

2

1

Q10

CHCA

10

5

1

0

1

2

2

8

2

2

2

7

SPA

4

4

7

0

4

2

3

2

4

0

1

7

Non-redundant peaks

11

20

17

15

4

0

2

9

8

11

3

22

14

136